COURSE LOG

NAME OF INSTITUTION Lahore Garrison University
PROGRAM (S) TO BE EVALUATED Computer Science
Course Name Digital Logic Design
Catalog Number
Instructor Name Muhammad Waheed ul Hassan
WeekDurationTopics Covered Evaluation Instruments UsedSignature
13-3-2023 1.5 hours AND Gate Operation
1.5 hours OR Gate Operation
20-3-2023 1.5 hours NOT Gate Operation
1.5 hours NAND Gate Operation
27-3-2023 1.5 hours NOR Gate Operation
1.5 hours XOR Gate Operation
3-4-2023 1.5 hours Construction of XOR Gate from NAND Gate Quiz 1
1.5 hours Complements, Arithmetic Operations with unsigned numbers
10-4-2023 1.5 hours K-Map with 2 Variables
1.5 hours K-Map with 3 Variables
17-4-2023 1.5 hours K-Map with 4 Variables
1.5 hours K-Map with 5 Variables Project Proposal
24-4-2023 1.5 hours Half Adder Operation
1.5 hours Full Adder Operation
1-5-2023 1 Hour Mid Term
8-5-2023 1.5 hours Half Subtractor Operation
1.5 hours Full Subtractor Operation
15-5-2023 1.5 hours 7-Segment Display Operation Quiz 2
1.5 hours Decoder Operation
22-5-2023 1.5 hours BCD to 7-Segment Display
1.5 hours Multiplexer Gate Operation
29-5-2023 1.5 hours Using Multiplexer and Demultiplexer/Decoder
1.5 hours Multiplexing 7-Segment Displays
5-6-2023 1.5 hours Comparator Operation
1.5 hours D Latch and Flip Flop Operation
12-6-2023 1.5 hours Latching BCD Data for displaying 7-Segment Display Quiz 3
1.5 hours Recalculating Data
19-6-2023 1.5 hours J-K Flip Flop Operation
1.5 hours Random Access Memories
26-6-2023 1.5 hours Frequency Counter Design
1.5 hours T Flip Flop Operation Project evaluation
3-7-2023 2 Hour Final Term
Instructor Name Muhammad Waheed ul Hassan
Instructor Signature
Date