COURSE LOG

NAME OF INSTITUTION Lahore Garrison University
PROGRAM (S) TO BE EVALUATED Computer Science
Course Name Digital Logic Design
Catalog Number
Instructor Name Hassan Sultan
WeekDurationTopics Covered Evaluation Instruments UsedSignature
21-March-2022 1.5 hours AND Gate Operation
1.5 hours OR Gate Operation
28-March-2022 1.5 hours NOT Gate Operation
1.5 hours NAND Gate Operation
4-April-2022 1.5 hours NOR Gate Operation
1.5 hours XOR Gate Operation
11-April-2022 1.5 hours Construction of XOR Gate from NAND Gate
1.5 hours Half Adder Operation
18-April-2022 1.5 hours Full Adder Operation
1.5 hours Full Adder Operation
25-April-2022 1.5 hours Decoder Operation
1.5 hours Decoder Operation
2-May-2022 1.5 hours BCD to 7-Segment Display
1.5 hours BCD to 7-Segment Display
9-May-2022 1 Hour Mid Term
16-May-2022 1.5 hours Combinational logic using NOR gates
1.5 hours Combinational logic using NOR gates
23-May-2022 1.5 hours Multiplexer Operation
1.5 hours Multiplexer Operation
30-May-2022 1.5 hours Multiplexer Operation Using Multiplexer and Demultiplexer/Decoder.
1.5 hours Multiplexer Operation Using Multiplexer and Demultiplexer/Decoder.
6-June-2022 1.5 hours J-K Flip Flop Operation
1.5 hours J-K Flip Flop Operation
13-June-2022 1.5 hours . D Latch
1.5 hours . D Latch
20-June-2022 1.5 hours Flip Flop Operation
1.5 hours Flip Flop Operation
27-June-2022 1.5 hours Random Access Memories Frequency Counter Design
1.5 hours Random Access Memories Frequency Counter Design
4-July-2022 1.5 hours Latching BCD Data for Displaying 7-segment
1.5 hours Revision
11-July-2022 2 Hour Final Term
Instructor Name Hassan Sultan
Instructor Signature
Date